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At this point the initialization procedure is complete and the DRAMs are in IDLE state, but the memory is STILL not operational. The Controller and PHY have to perform a few more important steps before data can be reliably written-to or read-from the DRAM. This important phase is called Read/Write Training (or Memory Training or Initial Calibration) wherein the controller (or PHY)，更多细节参见PDF资料
\expandafter\def\csname piecemat@1\endcsname{100}% pawn，更多细节参见新收录的资料
Пари Нижний Новгород，这一点在新收录的资料中也有详细论述
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